In an analog process among manufacturing processes of semiconductor devices, a polysilicon layer is typically formed in duplicate to implement an independent thin film capacitor with respect to a bias. Specifically, such a double polysilicon layer is composed of an upper layer which is named a gate poly (hereinafter referred to as "GPOLY") and is used as a gate electrode, and a lower layer which is named a resistor poly (RPOLY) and is used as a lower capacitor electrode or a poly resistor.
According to the thin film capacitor produced by a conventional method, however, the uniformity of resistance per lot, wafer, is and region of the same wafer is widely distributed, causing the product inferiority as well as the increase of the number of processes.
FIGS. 2 to 9 are sectional views explaining conventional processes for making a capacitor having a thin film resistor, as illustrated by FIG. 1. As shown in FIG. 2, polysilicon is deposited on the upper surface of a silicon substrate 10, on which a typical field oxide layer 20 is separately formed as a capacitor region and a resistor region to form a first polysilicon layer 30, and then a buffer oxide layer 22 is thermally grown thereon as shown in FIG. 3.
Thereafter, an impurity ion implantation step is performed with respect to the first polysilicon layer 30 through the buffer oxide layer 22 as shown in FIG. 4, and then the buffer oxide layer 22 is removed on the whole by etching, as illustrated by FIG. 5. Thereafter, a bottom oxide layer 24 is thermally grown on the upper surface of the first polysilicon layer 30 as shown in FIG. 6, and then a silicon nitride layer 40 is formed on the upper surface of the bottom oxide layer 24 as shown in FIG. 7.
Next, as shown in FIGS. 7 and 8, a pattern of photoresist 70 for forming a capacitor and a resistor is formed on the silicon nitride layer 40, and then the silicon nitride layer 40, the bottom oxide layer 24, and the first polysilicon layer 30 are etched using an etching mask so that the substrate is exposed to form the RPOLY. A second polysilicon layer 35 is formed by deposition on the upper surface of the resultant material. Thereafter, as shown in FIG. 9, a photoresist (not shown) pattern is formed on the resultant material, and then the second polysilicon layer 35 is etched using the photoresist as an etching mask so as to form the GPOLY.
However, in the conventional method of making a thin film capacitor, oxidation of a grain boundary 31 is severely occurred when forming the buffer oxide layer 22 (see FIG. 10). Also, when removing the buffer oxide layer 22 by etching after ion-implantation process is performed with respect to the first polysilicon layer 30 which is arranged in the lower part, a pit formed in the grain boundary 31 is grew bigger (see FIG. 11), and thereby the impurity implanted into the first polysilicon layer 30 when forming the bottom oxide layer 24 is non-uniformly lost (see FIG. 12). Accordingly, the resistance distribution of the RPOLY deteriorates, and the quality of the bottom oxide layer 24 is lowered because the bottom oxidation is advanced along the pit. As a result, since the first polysilicon layer 30, that is, the POLY is used as a bottom electrode of the PIP (polysilicon-insulator-polysilicon) capacitor, non-uniformity of the resistance distribution can deteriorate properties of the capacitor.